Wednesday, February 6, 2019

Floating Point Coprocessors :: essays research papers

Floating Point Co mainframe computersThe designer of any microprocessor would like to extract its instructionset almost infinitely yet is limited by the quantity of silicon available (notto mention the problems of testability and complexity). Consequently, a realmicroprocessor represents a compromise between what is desirable and what isacceptable to the majority of the chips users. For example, the 68020microprocessor is not optimized for calculations that take a large volume ofscientific (i.e. adrift(p) point) calculations. One manner to significantlyenhance the performance of such a microprocessor is to add a coprocessor. Toincrease the power of a microprocessor, it does not suffice to add a few more book of instructions to the instruction set, but it involves adding an auxiliaryprocessor that works in parallel to the MPU (Micro Processing Unit). A systeminvolving simultaneously operating processors can be very complex, since thereneed to be dedicated communication paths bet ween the processors, as well as software to divide the tasks among them. A practical multiprocessing systemshould be as simple as possible and require a minimum budget items in terms of bothhardware and software. There are miscellaneous techniques of arranging a coprocessoralongside a microprocessor. One technique is to bear the coprocessor with aninstruction interpreter and program counter. Each instruction fetched frommemory is examined by both the MPU and the coprocessor. If it is a MPUinstruction, the MPU executes it otherwise the coprocessor executes it. It canbe seen that this solution is feasible, but by no means simple, as it would bedifficult to get the MPU and coprocessor in step. Another technique is to equipthe microprocessor with a special mickle to communicate with the externalcoprocessor. Whenever the microprocessor encounters an operation that requiresthe intervention of the coprocessor, the special bus provides a dedicated high-speed communication between the M PU and the coprocessor. Once again, thissolution is not simple. There are more methods of connecting two (or more)concurrently operating processors, which go away be covered in more detail duringthe specific discussions of the Intel and Motorola floating point coprocessors.Motorola Floating Point Coprocessor (FPC) 68882The designers of the 68000-family coprocessors decided to implementcoprocessors that could work with lively and future generations ofmicroprocessors with minimal hardware and software overhead. The actual approachinterpreted by the Motorola engineers was to tightly couple the coprocessor to thehost microprocessor and to treat the coprocessor as a memory-mapped peripherallying inside the CPU address space. In effect, the MPU fetches instructions frommemory, and, if an instruction is a coprocessor instruction, the MPU passes it

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